As we know there is built in IDE (AT-Bus, ATA) disk interface in
Atari Falcon and ST Book. The necessary logic is integrated in case of
Falcon into Combel chip. Without having it's details (intern logic) I
can conclude that IDE logic is practically same as most of IDE adapters
made for ST(E) machines. And it means that signal timing is not
ideal, not by newer ATA specs. But it worked well with IDE hard
disks in it's time (1992) and still works well with most new ones.
Problems appear by some CF cards. I think that explanation is in
changing from AT-bus to EIDE, later to ATA. Will not go more detailed
in all it, but point is in signal timings - by first drives it was made
compatible with slow AT-bus (8 MHz), and now should suit much faster
transfers.
Above diagram is logical one, so shows not
real voltage levels ( CS0-1 and IOWR, IORD, AS etc. are low active) -
high means active on diagram. So, as is visible newer ATA specs
expect that IORD and IOWR activate with delay of T1 in compare to CS
activation, and deactivate earlier. But with usual IDE interfaces
in Atari ST machines it is not the case - see bottom of diagram. I observed problems first with
Kingston CF cards, but some other CF card brands may have same.
The solution: of course
writing to IDE is main problem. Reading from IDE may be succesful if
lack of T1 delay is not the problem. Then CPU will read correct data,
as AS, UDS, LDS will close before IORD. But by writing to
IDE IOWR closes to late, and especially if IDE
adapter logic is slow false data will appear on D0-D15. Adding dual monostable which
will ensure T1 delay and limit duration of IOWR is proved solution
(tested in my STE, with Kingston 1GB card + 128 MB Transcend IDE Flash).
I made another solution in case
of cartridge port based IDE IF. There is too big delay of R3, R4
signals by ST machines (some 35-40 nS), so with other delays we will
have too short T2 time. Therefore I use 8-bit latch for CS0-CS1,
A0-A2 and set them with proper instruction before any IDE access. But
monostable is still needed to control length of T2.
By P. Putnik
Last revised: Sept. 2010.
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